Advanced Professional Development Course
GHz Signal Integrity and Power Integrity Aspects
presented by Mr. S L N Murthy
28 February 2020 | 9.30 AM - 5.30 PM | Pai Groups, Bengaluru
IPC India – a wholly owned subsidiary of IPC, USA is set to conduct a one-day Advanced Professional
Development Course on GHz Signal Integrity and Power Integrity Aspects presented by Mr. S L N Murthy
on 28th February 2020 in Bengaluru.
The registration for the workshop is open to all participants till February 23, 2020.
Controlled impedance designs that emerged during early 1990’s was the forerunner for design challenges
for PCB designers. This PCB transmission line impedance a driving factor in delivering the high-speed
boards has been eclipsed by chipsets with sub-nanosecond switching times.
Interconnects and their behaviour are now governed by device rise times, PCB material conductor
characteristics, dielectric properties etc. Choice of material dependant on, insertion loss,
surface roughness of copper is becoming a critical decision point.
Key parameters of interconnect, performance pointers, and decision making when PCB build
characteristics vary from fabricator to fabricator as impact of PCB stack build variances are addressed.
Simulation of the interconnects based on placement at pre-route level and deriving the routing constraints
are a key part of design process. Post-route validation including 3D modelling of VIA’s are detailed.
Challenges in analysis of structures, modelling aspects of device, interconnect and VIA are detailed
to ensure a robust design.
These aspects of signal interconnects are detailed in this program. Modelling devices, interconnects,
analysing the same are presented. Alternative PCB build like HDI are presented. High speed technologies
like PCIe, DDRx, are detailed including case studies and solutions therein.
Power Integrity is reviewed in detail taking the various aspect of design realisation. This covers
details of DC Voltage drop, plane structure and its importance to ensure proper voltage delivery at
the chip (silicon) level. Importance of the Decoupling Capacitors, their choice, modelling for
computation of AC target impedance of the power plane structures are detailed. Capacitor mounting
recommendations, type of Capacitor and dielectric material characteristics are reviewed.
Case studies using Mentorgraphics Hyperlynx software is presented as either videos of actual
design validation or design examples are presented to make the concepts clear.